JADE

Fast Multiprocessor Design and Simulation Environment

This project developed a fast multiprocessor system design exploration and simulation environment called JADE (Joint Application/Architecture Design Exploration). JADE supports statistical, recorded, and synthetic application models. It can model network-on-chips, inter-chip networks, and intra-rack networks using optical and electrical interconnects. JADE supports memory hierarchy and cache coherence. It can simulate low-power techniques such as clock gating, DVFS, and power gating with built-in power analysis.

Project Member: Chengeng Li, Fan Jiang, Shixi Chen, Jiang Xu, Jun Feng, Xiao Li, Lin Chen

Maintained by: Chengeng Li (chengeng.li@connect.ust.hk). If there is any inquiry or suggestion, please do not hesitate to contact us.

Past Member: Zhongyuan Tian, Xuanqi Chen, Rafael Kioji Vivas Maeda, Haoran Li, Zhifei Wang, Zhehui Wang, Peng Yang, Zhe Wang, Xiaowen Wu, Xuan Wang

Download User Manual

Or you can download the full package directly.

Download JADE 5.0 (650MB)

AGREEMENT

JADE is made openly available under the following license. Please cite the following paper if it is used.

Fan Jiang, Rafael Kioji Vivas Maeda, Jun Feng, Shixi Chen, Lin Chen, Xiao Li, Jiang Xu, “Fast and Accurate Statistical Simulation of Shared-Memory Applications on Multicore Systems,” IEEE Transactions on Parallel and Distributed Systems, 2022.

COPYRIGHT AND LICENSE

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met.

Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
Neither the name of the Hong Kong University of Science and Technology nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.